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Item type:Publication, Access status: without files , Chemical vapor deposition of tungsten silicide (WSiₓ) for high aspect ratio applications(Elsevier, 2003-10-22); ; 12 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Interface analysis of atomic layer deposited-TiN gate electrodes on ultrathin SiO₂layers(AVS Science and Technology Society, 2003); ; A study was performed on the interface analysis of atomic layer deposited-TiN gate electrodes on ultrathin SiO₂layers. The temperature dependence of the C-V curves was discussed and an unintended titanium-rich layer at the interface, which disappears after annealing above 800 °C was indicated. It was found by leakage current analysis that a thermal stability up to 800°C was obtained for TiN gates on ultrathin SiO₂ layers with an enhanced tunneling current as compared to simulations.Publicationtype: Journal Article3 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Experimental study and modeling of the temperature dependence of soft breakdown conduction in ultrathin gate oxidesIn this work, we focus our interest on the temperature dependence of soft breakdown conduction (SBD), mainly in the range in which real devices are commonly operated (-20°C<T<160°C). A thorough experimental study involving samples with different oxide thicknesses and substrate types is presented, and the results are interpreted in terms of an extended version of the quantum point contact model (QPC) for the non-zero temperature case. Even though several approaches attempting to explain the SBD I-V characteristics have been proposed, analytical modeling of its temperature dependence has always been restricted to a single bias condition. In contrast, we provide a simple parameterization of the experimental data which accounts for both I-V and I-T characteristics within a consistent framework based on the physics of mesoscopic conductors. The magnitude of the current flowing through the SBD spot essentially depends on the barrier height encountered by incoming electrons, while the shape of the I-V characteristics is dictated by the particular features of the spot and the potential drop distribution.Publicationtype: Conference Paper12 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Fast interface characterization of tunnel oxide MOS structures(2002-12-01); ; As new gate materials become increasingly interesting in conjunction with tunnel oxides, a fast and reliable interface characterization technique becomes Indispensable. Fast turnaround times require a method which can be applied to simple test structures like planar capacitors. For the first time, we demonstrate an automatic extraction of physical oxide thickness and fiatband potential from capacitance-voltage measurements which includes quantum confinement effects and Fermi-Dirac statistics. Automatic extraction is necessary for uniformity analysis across a whole wafer. New gate materials are typically binary or ternary alloys where the interface to the gate dielectric is very sensitive to deposition parameters. Such systems are likely to show higher nonuniformities than polysilicon electrodes. An example is presented where polysilicon gates exhibit a uniformity in fiatband potential within a wafer of less than ±15 mV while a thickness variation of 0.1 nm has been observed.Publicationtype: Journal Article10 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Charge-based capacitance measurements (CBCM) on MOS devicesA new simple method of measuring capacitance-voltage characteristics of MOS devices is presented. Proceeding from the charge-based capacitance measurement technique suggested recently, a compact test structure with high resolution has been developed, which only requires measurement of dc quantities. The method was tested on a 0.6-μm CMOS process with small and large area capacitors and compared to well-known high-frequency capacitance-voltage results. Beside using a reference structure, a second means of extracting parasitic effects is demonstrated for small structures. The test structure allows measurements in a wide frequency range with high accuracy and low noise contribution at small capacitance levels.Publicationtype: Journal Article47 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: with files , Interface characterization of metal-gate MOS-structures and the application to DRAM-capacitorsThe main result of this study is the development of a full analysis procedure for metal-gate MOS-structures that allows to identify problems during processing and to extract physical parameters of metal electrodes. With knowledge gained from this analysis a polysilicon/TiN-stack has been developed and successfully integrated as low-resistance electrode into state-of-the-art deep trench DRAM-capacitors. These electrodes will be required to fabricate sub-100 nm deep trench DRAMs.Publicationtype: Doctoral Thesis983 2513 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Access status: without files , Interface characteristics between tungsten silicide electrodes and thin dielectricsIn today's ULSI technology there is an increasing demand in metal electrodes for storage capacitors and transistors. In this publication we present an investigation of MOS capacitor structures with CVD tungsten silicide (WSix) as metal electrode in conjunction with silicon dioxide (SiO2) and oxidized nitride (NO). Bulk silicon and poly silicon were used as second electrode, respectively. Tungsten silicide has been used both as gate electrode and as bottom electrode. For both cases thermal stability up to 780 °C with low leakage current has been shown. Band discontinuities between SiO2 and WSix were estimated from current-voltage measurements.Publicationtype: Journal Article12